the SY100EL15L is a low skew 1:4 clock distribution ic designed explicitly for low skew clock distribution applications. the device can be driven by either a differential or single-ended ecl or, if positive power supplies are used, pecl input signal. if a single-ended input is to be used the v bb output should be connected to the clk input and bypassed to ground via a 0.01 f capacitor. the v bb output is designed to act as the switching reference for the input of the el15 under single- ended input conditions. as a result, this pin can only source/sink up to 0.5ma of current. the el15 features a multiplexed clock input to allow for the distribution of a lower speed scan or test clock along with the high speed system clock. when low (or left open and pulled low by the input pull-down resistor) the sel pin will select the differential clock input. the common enable (en) is synchronous so that the outputs will only be enabled/disabled when they are already in the low state. this avoids any chance of generating a runt clock pulse when the device is enabled/ disabled as can happen with an asynchronous control. the internal flip flop is clocked on the falling edge of the input clock, therefore all associated specification limits are referenced to the negative edge of the clock input. when both differential inputs are left open, clk input will pull down to v ee and clk input will bias around v cc /2. pin function clk differential clock inputs sclk synchronous clock input en synchronous enable sel clock select input v bb reference output q 0-3 differential clock outputs truth table pin names features description rev.: a amendment: /0 issue date: december 1999 pin configuration/block diagram clockworks SY100EL15L final clk sclk sel en q l xlll hxllh xlhll xhhlh xxxhl* * on next negative transition of clk or sclk v cc clk q 0 q 0 q 1 q 2 q 2 q 3 q 3 v ee sel v bb clk en 16 15 14 13 12 11 10 9 q 1 1 2 34567 8 d q 1 0 sclk soic top view 3.3v power supply 50ps output-to-output skew low power synchronous enable/disable multiplexed clock input 75k ? internal input pull-down resistors available in 16-pin soic package 3.3v 1:4 clock distribution 1
2 clockworks SY100EL15L micrel symbol rating value unit v ee power supply (v cc = 0v) ?.0 to 0 vdc v i input voltage (v cc = 0v) 0 to ?.0 vdc i out output current ?ontinuous 50 ma ?urge 100 t a operating temperature range ?0 to +85 c notes: 1. absolute maximum rating, beyond which, device life may be impaired, unless otherwise specified on an individual data sheet. 2. parametric values specified at: 3 volt power supply range 100el15l series ?.0v to ?.8v. absolute maximum ratings (1) t a = ?0 ct a = 0 ct a = +25 ct a = +85 c symbol parameter min. max. min. max. min. typ. max. min. max. unit v oh output high voltage (2) ?085 ?80 ?025 ?80 ?025 ?55 ?80 ?025 ?80 mv v ol output low voltage (2) ?830 ?555 ?810 ?620 ?810 ?705 ?620 ?810 ?620 mv v oha output high voltage (3) ?095 ?035 ?035 ?035 mv v ola output low voltage (3) ?555 ?610 ?610 ?610 mv v ih input high voltage ?165 ?80 ?165 ?80 ?165 ?80 ?165 ?80 mv v il input low voltage ?810 ?475 ?810 ?475 ?810 ?475 ?810 ?475 mv i ih input high current 150 150 150 150 a i il input low current (4) 0.5 0.5 0.5 0.5 a clk ?00 ?00 ?00 ?00 i ee power supply current 35 35 25 35 38 ma v bb output reference voltage ?.38 ?.26 ?.38 ?.26 ?.38 ?.26 ?.38 ?.26 v dc electrical characteristics v ee = 3.3v 10%; v cc = gnd (1) notes: 1. this table replaces the three traditionally seen in ecl 100k data books. outputs are terminated through a 50 ? resistor to ?.0v. 2. v in = v ih (max) or v il (min). 3. v in = v ih (min) or v il (max). 4. v in = v il (max).
3 clockworks SY100EL15L micrel t a = ?0 ct a = 0 ct a = +25 ct a = +85 c symbol parameter min. max. min. max. min. typ. max. min. max. unit t plh propagation delay ps t phl clk to q (diff) 460 660 470 670 470 670 500 700 clk to q (se) 410 710 420 720 420 720 450 750 sclk to q 410 710 420 720 420 720 470 750 t skew part-to-part skew (1) 200 200 200 200 ps within-device skew 50 50 50 50 t s setup time en 150 150 150 150 ps t h hold time en 400 400 400 400 ps v pp minimum input swing clk 250 250 250 250 mv v cmr common mode range (2) mv v pp < 500mv ?.0 ?.4 ?.1 ?.4 ?.1 ?.4 ?.1 ?.4 v pp 500mv ?.8 ?.4 ?.9 ?.4 ?.9 ?.4 ?.9 ?.4 t r output rise/fall timesq 375 625 325 575 325 575 325 575 ps t f (20% ?80%) ac electrical characteristics v ee = 3.3v 10%; v cc = gnd (1) notes: 1. skews are specified for identical low-to-high or high-to-low transitions. 2. v cmr is referenced to the most positive side of the differential input signal. normal operation is obtained when the input signals are within the v cmr range and the input swing is greater than v pp (min.) and <1v. the lower end of the v cmr range varies 1:1 with v ee . the numbers in the spec table assume a nominal v ee = ?.3v. note for pecl operation, the v cmr (min) will be fixed at 3.3v ?|v cmr (min)|. product ordering code ordering package operating code type range SY100EL15Lzc z16-2 commercial SY100EL15Lzctr z16-2 commercial
4 clockworks SY100EL15L micrel 16 lead soic .150" wide (z16-2) rev. 02 micrel-synergy 3250 scott boulevard santa clara ca 95054 usa tel + 1 (408) 980-9191 fax + 1 (408) 914-7878 web http://www.micrel.com this information is believed to be accurate and reliable, however no responsibility is assumed by micrel for its use nor for an y infringement of patents or other rights of third parties resulting from its use. no license is granted by implication or otherwise under any patent or pat ent right of micrel inc. ? 2000 micrel incorporated
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